Integrated circuits have become more “dense” over time, i.e., more logic features have been implemented in an IC. More recently, Stacked-Silicon Interconnect Technology (“SSIT”) allows for more than one semiconductor die to be placed in a single package. SSIT ICs may be used to address increased demand for communication bandwidth. However, even though ICs using SSIT have more than one die, such ICs still have significant bandwidth restriction due to pin constraints.
Hence, it is desirable to provide an SSIT IC having less bandwidth restriction.